محتوى الدورة
Chapter 1 Register Transfer & Microoperation
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1. Register Transfer Language
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2. Register Transfer part 1
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3. Register Transfer part 2
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4. Connecting Registers
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5. Bus and Bus Transfer
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6. Memory Transfer
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7. Microoperations
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8. Arithmetic Circuit
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9. Full Arithmetic Circuit
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10. Logic Microoperations
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11. Application of Logic Microoperations
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12. Shift Microoperation
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13. Hardware Implementation Shift Microoperation
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14. Arithmetic Logic Shift Unit
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ملخص قوانين الشابتر pdf
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Chapter 1 book solution حلول مسائل الكتاب
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Problem 1.1 solution | حل مسألة
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Problem 1.3 solution | حل مسألة
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Problem 1.5 solution | حل مسألة
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Problem 1.6 solution | حل مسألة
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Problem 1.7 solution | حل مسألة
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Problem 1.18 solution | حل مسألة
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Problem 1.19 solution | حل مسألة
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Problem 1.20 solution | حل مسألة
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Problem 1.21 solution | حل مسألة
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Problem 1.22 solution | حل مسألة
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Problem 1.23 solution | حل مسألة
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Chapter 2 Basic Computer Organization and Design
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2.1 Instruction Codes – a) The Basic Computer
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2.1 Instruction Codes – b) Instruction Format and Addressing Modes
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2.2 Computer Registers – a) Basic Computer Registers
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2.2 Computer Registers – b) Basic Computer Common Bus System
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2.3 Basic Computer instructions
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2.4 Timing and Control
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2-5 part 1 Instruction Cycle
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2-5 part 2 Register Reference Instructions
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2.6 Memory Reference instructions
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2.7 Input-Output and Interrupt
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2.8 Complete Computer Description
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2.9 Design of Basic Computer
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2.10 part 1 Design of Accumulator Logic
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ملخص قوانين الشابتر pdf
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Chapter 2 book solution حلول مسائل الكتاب
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Problem 2.1 solution | حل مسألة
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Problem 2.2 solution | حل مسألة
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Problem 2.3 solution | حل مسألة
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Problem 2.4 solution | حل مسألة
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Problem 2.5 solution | حل مسألة
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Problem 2.6 solution | حل مسألة
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Problem 2.7 solution | حل مسألة
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Problem 2.10 solution | حل مسألة
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Problem 2.11 solution | حل مسألة
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Problem 2.12 solution | حل مسألة
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Problem 2.16 solution | حل مسألة
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Problem 2.17 solution | حل مسألة
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Chapter 3 Programming The Basic Computer
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3.1 Introduction
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3.2 Machine Language
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3.3 (a) Assembly Language
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3.3 (b) Pseudo-Instructions
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3.3 (c) Translation to Binary
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3.4 The Assembler
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3.5 Programming Arithmetic and Logic Operations
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ملخص قوانين الشابتر pdf
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Chapter 3 book solution حلول مسائل الكتاب
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Problem 3.1 solution | حل مسألة
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Problem 3.2 solution | حل مسألة
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Chapter 4 Central Processing Unit
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4.1 Introduction
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4.2 General Register Organization
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4.3 Stack Organization (a) Register Stack
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4.3 Stack Organization (b) Memory stack
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4.3 Stack Organization (c) Reverse Polish Notation
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4.4 Instruction Formats (a) Processor Organization
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4.4 Instruction Formats (b) Three, Two, One, Zero Address Instructions
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4.5 Addressing Modes
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4.6 Data Transfer and Manipulation
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4.7 Program Control
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ملخص قوانين الشابتر pdf
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Chapter 4 book solution حلول مسائل الكتاب
Chapter 5 Memory Organization
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5.1 Memory Hierarchy
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5.2 Main Memory (a) RAM & ROM
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5.2 Main Memory (b) Example 1 solution
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5.2 Main Memory (c) Example 2 solution
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ملخص قوانين الشابتر pdf
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Chapter 6 CISC vs RISC
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6.1 Introduction
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6.2 CISC Architecture
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6.3 RISC Architecture
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6.4 RISC and CISC Comparison
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6.5 Von Neumann and Harvard Architecture
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ملخص قوانين الشابتر pdf
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Chapter 7 Pipelining
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1. Pipelining
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2. Operations in Each Pipeline Stage
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3. Pipeline Speedup
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3. Pipeline Speedup Example 1 solution
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3. Pipeline Speedup Example 2 solution
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ملخص قوانين الشابتر pdf
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Chapter 8 Parallel Computer Architecture
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1. (a) Parallel Processing Intro
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1. (b) Parallel Processing [SISD – SIMD – MISD – MIMD]
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2. Topology Classification (13.2 book)
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ملخص قوانين الشابتر pdf
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Computer Architecture | معمارية حاسب
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